1. Field of the Invention
The present invention relates to the protection of electrical circuits and to the detection of electrical arcing faults and in addition, optional overload, short circuit, surge and ground fault detection.
2. Arcing is a condition where an intermittent flow of current occurs along or across current-carrying conductors with subsequent discharge of light and heat energy that builds up in time until it burns the wire insulation and ultimately the vicinity to cause fire. Arcing occurs when the electric field between two or more separated conductors reaches the ionization potential of the separating medium which often is a gap between conductors. Arcing is known to be a major cause of electrical fires.
Arc Fault Circuit Interrupters (commonly known as AFCI) mitigate the effects of arcing by detecting arcs and interrupting the power supply to an electric circuit when arcs occur. For the purposes of this disclosure, the term arc (or arcs) when used singly, are those that are considered dangerous which causes electrical fires.
AFCIs could come in different types or forms including receptacle, receptacle outlet, circuit breaker, cord type, portable type, modular or integrated as part of another electrical system, equipment or device. The AFCIs in this disclosure provide circuit protection by detecting arcs and other electrical faults that could include overcurrent or overload, short circuit and with associated hardware and microprocessor code modification could include surge, ground and any other electrical faults, AC (alternating current) or DC (Direct Current), single or multi-phase. This disclosure also include systems, methods and apparatus for the interruption (or isolation) of power supply to electric circuits on the occurrence of said faults.
Prior arts have employed many different methods and techniques for arc fault detection and interruption, in most cases concentrating on a particular condition or type of arc. In reality, there are multiple types of arcs. This disclosure involves AFCIs that protect circuits from series and parallel arcs and they are commonly known as combination type AFCIs.
Series arcs are those that occur along a current-carrying conductor when it is cut or severed but somehow an unstable conductive path still exists. This could either be through incomplete separation of conductors or through carbonization of the gap between them. Loose terminal connections are considered a series arcing condition.
Parallel arcs are those that occur across two current-carrying conductors where an unstable conductive path exists between them. This could be through a carbonized path or metallic object such as a nail accidentally driven between the conductors. This type of arc being across two conductors is typically a high current of intermittent flow, which may in some cases be mistaken as a short circuit condition.
There are some electrical equipment and loads whose signal characteristics (or signatures) mimic those of arcs and some that produce actual arcs in normal operation. These are sometimes called or termed good arcs When an AFCI mistakenly detects a good arc and interrupts power supply to a circuit, this is considered a nuisance tripping condition which also occurs when there is excessive noise in the circuit that the resulting signature mimics that of an arc. The devices, apparatus, methods and systems in this disclosure are intended to limit or eliminate the occurrence of nuisance tripping conditions.
Prior arts have not successfully addressed many challenges in arc fault detection and interruption as reflected by the limited number of AFCI devices currently commercially available, and this opens up opportunities for new developments and improvements in this technology.
U.S. Pat. No. 7,062,388 (Rivers, Jr. et al.) disclosed a frequency harmonic identifier for detecting series arcs on a power line that includes a frequency analyzer for providing the harmonic content of a sensed current signal and a decision logic for comparing a tested signal to at least one reference signal. This also discloses that the frequency analyzer provides a Fast Fourier Transform of the input signal and a band selector for selecting bands of the Fast Fourier transform of the input signal for comparing to at least one reference signal. While embodiments of this invention mentioned about the fundamental to the 3rd harmonics, these are used for computative analysis between harmonics, and not by comparison of a tested signal to at least one reference signal as covered by Rivers' patent. The embodiments of this invention does not employ Fast Fourier Transform and a band selector but instead uses coherent Direct Fourier Transform, which is different.
U.S. Pat. No. 7,391,218 (Kojori, et al.) disclosed a method and apparatus to detect series and/or parallel arc faults in AC and DC systems, wherein a fundamental component of the AC current signal is extracted and monitored for amplitude variation as a first arc detection measure, and non-stationary changes in the AC current signal applying at least one measure of order generating a second arc fault detection measure. Anyone experienced in the art of arc detection understands that it requires numerous methods, calculations, and combinations thereof to effectively detect arc faults and eliminate the occurrence of nuisance conditions. While analysis of fundamental component of the AC current signal could indicate the presence of arc fault, it does not cover all the other elements of arcing detection specially with different loads and/or plurality of loads with signals that mimic that of an arcing condition, or a nuisance condition. The embodiments of this invention includes fundamental harmonic but not applied as that of Kojori invention but instead used to obtain a ratio against the other harmonics, as one of the conditions in arc fault detection. This is only one of plurality of methods used in the detection of arc faults employed in this disclosure.
U.S. Pat. No. 6,876,528 (Macbeth et al.) disclosed a fault detector sensor includes a current transformer, with two multi-turn windings each formed around a portion of the core, with one winding adjacent to each of the hot and neutral wires of the power line being protected. Both windings are connected in series in a way which reinforces arc fault noise generated by arc faults involving the line and neutral, but which causes signal reduction for noise signals from the line and neutral, or either, to ground. The windings and core are selected to self resonate at a frequency that excludes power line carrier frequencies but which includes arc fault frequencies. The core optionally has a third winding, forming a grounded neutral transformer, or ground fault detector. Instead of a third winding, one of the arc fault sensing windings can act as a dual function sensor. This patent discloses the use of the current transformer as the sensing element used in most prior arts or electrical fault detection. Prior arts mentioned the same current transformer as Hall sensor, current sensor, 2 resonant circuit, clamp and other names, but all are different to the HES (1) in this invention.
U.S. Pat. No. 6,751,528 (Dougherty et al.) disclosed an electronically controlled circuit breaker comprising: a line current sensor sensing line current signals; a processor for determining the fundamental frequency of the current signals, wherein the processor processes a preselected number of multiples of the fundamental frequency, and squares and sums the multiples to yield even, odd, and fundamental values; even, odd, and fundamental bins within the processor for receiving the even, odd, and fundamental values, wherein the processor processes even arc signals and non-harmonic arc signals from the even, odd, and fundamental values in the bins; and, an expert arc algorithm within the processor having an accumulator for calculating an incremental value based on even arc signal and non-harmonic arc signal input, and additionally wherein the processor applies an acceleration factor to the incremental value when both an even arc threshold and a non-harmonic arc threshold are exceeded by the even arc signal and the non-harmonic arc signal, respectively, and a fixed threshold for which to compare the incremental value; wherein the processor issues a trip signal when the fixed threshold is exceeded by the incremental value. Unlike the embodiments of this invention which calculates its relationship with the 2nd and 3rd harmonics, the Dougherty patent relies on the multiples, squares and sums of the fundamental frequency to yield even, odd and fundamental values. Anyone experienced in the art of arc detection understands that it requires numerous methods, calculations, and combinations thereof to effectively detect arc faults and eliminate the occurrence of nuisance conditions. While analysis of fundamental frequency could indicate the presence of arc fault, it does not cover all the other elements of arcing detection specially with different loads and/or plurality of loads with signals that mimic that of an arcing condition, or a nuisance condition.
U.S. Pat. No. 7,440,245 (Miller et al.) disclosed a method of detecting an arc fault in a power circuit, said method comprising: determining a peak amplitude of a current pulse of a current flowing in said power circuit; determining whether the peak amplitude of said current pulse is greater than a predetermined magnitude; responsively employing at least one algorithm and said peak amplitude to determine whether an arc fault condition exists in said power circuit; determining that said current pulse has said peak amplitude of greater than said predetermined magnitude and responsively activating said at least one algorithm from said inactive state; employing a plurality of half-cycles of said current flowing in said power circuit including a present half-cycle and a previous half-cycle; and employing as one of said at least one algorithms: determining the peak amplitude of said current pulse for the present half-cycle and the previous half-cycle, determining that the peak amplitude of said current pulse for the previous half-cycle is greater than about zero and responsively adding an amount equivalent to an increase in said peak amplitude from the previous half cycle to the present half-cycle to an accumulator, and otherwise, adding an amount equivalent to said peak amplitude of said present half-cycle to said accumulator, decaying the amount stored in said accumulator over time, and determining an arc fault condition in said power circuit if the amount stored in said accumulator exceeds a predetermined value. Anyone experienced in the art of arc detection understands that it requires numerous methods, calculations, and combinations thereof to effectively detect arc faults and eliminate the occurrence of nuisance conditions.
U.S. Pat. No. 7,295,415 (Huang et al.) An end-of-service-life integrated circuit chip (IC2) capable of performing an end-of-service-life test in a circuit interrupting device, said IC2 comprising: a flip-flop latch circuit comprises a first transistor and a second transistor; wherein said flip-flop latch circuit is adapted to receive and transmit a status signal when said circuit interrupting device is powered on and at a tripped state, allow said circuit interrupting device to be reset when components in a main circuit of said circuit interrupting device function normally, and disallow said circuit interrupting device to be reset when at least one of said components in said main circuit of said circuit interrupting device do not function properly; and an emitter circuit comprising a third transistor; wherein said emitter circuit is adapted to output said status signal from said flip-flop latch circuit through said third transistor to a simulated leakage current generation circuit of said circuit interrupting device to generate a simulated leakage current to test whether said components in said main circuit of said circuit interrupting device function normally; and wherein said IC2 performs said end-of-service-life test without a depression of a reset button in said circuit interrupting device. This patent refers more to an analog determination which is completely different from the methods in this disclosure which employs a combination of hardware and code routines.
U.S. Pat. No. 7,295,410 (Packard et al.) Protective device with miswire protection is disclosed in this invention, however, the art is applied on wiring devices using a solenoid actuator operated tripping mechanism with a manual reset mechanism. Unlike this invention which uses a uP controlled operation associated with the detection circuitry which uses separate solenoid actuators for both the tripping and reset mechanisms. This patent also refers more to an analog determination which is completely different from the methods in this disclosure which employs a combination of hardware and code routines.
The methods of fault detection and interruption in this disclosure include a combination of hardware and software systems and apparatus to have a reliable arc fault circuit interrupter using commercially available and low-cost microprocessors.